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XR/RR Imaging and Co-Processor

For fast implementation of PCVR VR/XR headset based on Hypervision IP, we are developing electronics and co-processors to bridge between MIPI DSI displays, MIPI CSI Image sensors and PC. There are following modules:

A) 4 x MIPI displays driving electronics based on Display port to 2x MIPI DSI bridges

B) Sensor electronics module: 3DOF IMU, proximity sensor, IPD sensor

C) Pass-through real world 240°/360° stereo-camera stream based on 4 (or 5) MIPI cameras

D) Combiner of eyes and face tracking MIPI cameras stream and LED driver for NIR and RGB illumination

As a stage#2 we plan to combine all modules into single Co-Processor based on FPGA (or ASIC) that will drive up to 4x high resolution/frame rate MIPI displays, will collect image streams from external word cameras and from gaze and face tracking cameras. The co-processor will be interfaced to PC or SoC (for standalone VR/XR). There will be possibility to make real time processing of streams, distortions compensation and display contents rendering to off-load the PC or SoC. The option to direct real-word imaging directly to displays (bypassing the PC or SoC) will enable close to "Zero Latency" which is very important for pass-through AR (like is naturally available in see-through AR).

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